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Are Register Number In Hex On Mips Reference Sheet

Grand I P Southward Reference Data

Bones INSTRUCTION FORMATS

REGISTER Name, NUMBER, USE, CALL CONVENTION

CORE INSTRUCTION SET OPCODE

Name, MNEMONIC

FOR-

MAT OPERATION (in Verilog)

/ FUNCT

(Hex)

Add add R R[rd] = R[rs] + R[rt] (1) 0 / xxhex

Add together Immediate addi I R[rt] = R[rs] + SignExtImm (1,two) 8 hex

Add together Imm. Unsigned addiu I R[rt] = R[rs] + SignExtImm (2) 9 hex

Add Unsigned addu R R[rd] = R[rs] + R[rt] 0 / 21hex

And and R R[rd] = R[rs] & R[rt] 0 / 24hex

And Immediate andi I R[rt] = R[rs] & ZeroExtImm (iii) c hex

Co-operative On Equal beq I if(R[rs]==R[rt])

PC=PC+4+BranchAddr (4) 4 hex

Branch On Not Equal bne I if(R[rs]!=R[rt])

PC=PC+4+BranchAddr (4) 5 hex

Jump j J PC=JumpAddr (5) two hex

Jump And Link jal J R[31]=PC+8;PC=JumpAddr (5) iii hex

Spring Annals jr R PC=R[rs] 0 / 08hex

Load Byte Unsigned lbu I R[rt]={24'b0,K[R[rs]

+SignExtImm](vii:0)} (2) 24 hex

Load Halfword

Unsigned lhu I R[rt]={16'b0,Grand[R[rs]

+SignExtImm](fifteen:0)} (2) 25 hex

Load Linked ll I R[rt] = One thousand[R[rs]+SignExtImm] (2,7) thirty hex

Load Upper Imm. lui I R[rt] = {imm, xvi'b0} f hex

Load Word lw I R[rt] = M[R[rs]+SignExtImm] (ii) 23 hex

Nor nor R R[rd] = ~ (R[rs] | R[rt]) 0 / 27hex

Or or R R[rd] = R[rs] | R[rt] 0 / 25hex

Or Immediate ori I R[rt] = R[rs] | ZeroExtImm (3) d hex

Set Less Than slt R R[rd] = (R[rs] < R[rt]) ? one : 0 0 / 2ahex

Set Less Than Imm. slti I R[rt] = (R[rs] < SignExtImm)? 1 : 0 (2) a hex

Set Less Than Imm.

Unsigned sltiu I R[rt] = (R[rs] < SignExtImm)

? i : 0 (two,6) b hex

Set Less Than Unsig. sltu R R[rd] = (R[rs] < R[rt]) ? ane : 0 (half dozen) 0 / 2bhex

Shift Left Logical sll R R[rd] = R[rt] << shamt 0 / 00hex

Shift Correct Logical srl R R[rd] = R[rt] >> shamt 0 / 02hex

Store Byte sb I M[R[rs]+SignExtImm](seven:0) =

R[rt](vii:0) (2) 28 hex

Shop Conditional sc I K[R[rs]+SignExtImm] = R[rt];

R[rt] = (atomic) ? 1 : 0 (ii,7) 38 hex

Shop Halfword sh I Thou[R[rs]+SignExtImm](15:0) =

R[rt](15:0) (two) 29 hex

Store Word sw I Yard[R[rs]+SignExtImm] = R[rt] (2) 2b hex

Subtract sub R R[rd] = R[rs] - R[rt] (1) 0 / 22hex

Subtract Unsigned subu R R[rd] = R[rs] - R[rt] 0 / 23hex

(1) May cause overflow exception

(ii) SignExtImm = { 16{firsthand[fifteen]}, immediate }

(3) ZeroExtImm = { 16{1b'0}, immediate }

(5) JumpAddr = { PC+4[31:28], address, two'b0 }

(7) Atomic test&set pair; R[rt] = 1 if pair atomic, 0 if non diminutive

Ropcode rs rt rd shamt funct

31 26 25 21 xx xvi 15 11 x 6 5 0

Iopcode rs rt immediate

31 26 25 21 20 16 xv 0

Jopcode address

31 26 25 0

ARITHMETIC CORE Education SET OPCODE

Name, MNEMONIC

FOR-

MAT OPERATION

/ FMT /FT

/ FUNCT

(Hex)

Branch On FP True bc1t FI if(FPcond)PC=PC+iv+BranchAddr (iv) 11/eight/1/--

Branch On FP False bc1f FI if(!FPcond)PC=PC+four+BranchAddr(4) 1one/8/0/--

Split up div R Lo=R[rs]/R[rt]; Howdy=R[rs]%R[rt] 0/--/--/1a

Separate Unsigned divu R Lo=R[rs]/R[rt]; Hi=R[rs]%R[rt] (6) 0/--/--/1b

FP Add Unmarried add together.s FR F[fd ]= F[fs] + F[ft] 11/ten/--/0

FP Add

Double add.d FR {F[fd],F[fd+i]} = {F[fs],F[fs+ane]} +

{F[ft],F[ft+1]} oneone/eleven/--/0

FP Compare Single c.x.southward* FR FPcond = (F[fs] op F[ft]) ? one : 0 11/10/--/y

FP Compare

Double c.x.d* FR FPcond = ({F[fs],F[fs+one]} op

{F[ft],F[ft+1]}) ? 1 : 0 1one/eleven/--/ y

* (x is eq ,lt , or le) (op is ==, <, or <=) ( y is 32, 3c, or 3e)

FP Split Single div.due south FR F[fd] = F[fs] / F[ft] aneane/10/--/3

FP Divide

Double div.d FR {F[fd],F[fd+1]} = {F[fs],F[fs+ane]} /

{F[ft],F[ft+1]} 1ane/xi/--/iii

FP Multiply Unmarried mul.s FR F[fd] = F[fs] * F[ft] 11/x/--/two

FP Multiply

Double mul.d FR {F[fd],F[fd+1]} = {F[fs],F[fs+one]} *

{F[ft],F[ft+1]} one1/eleven/--/two

FP Subtract Unmarried sub.s FR F[fd]=F[fs] - F[ft] anei/10/--/i

FP Subtract

Double sub.d FR {F[fd],F[fd+one]} = {F[fs],F[fs+1]} -

{F[ft],F[ft+1]} 11/11/--/one

Load FP Unmarried lwc1 I F[rt]=M[R[rs]+SignExtImm] (two) 31/--/--/--

Load FP

Double ldc1 I F[rt]=M[R[rs]+SignExtImm]; (ii)

F[rt+one]=M[R[rs]+SignExtImm+4] 35/--/--/--

Motility From Hullo mfhi R R[rd] = Howdy 0 /--/--/x

Motion From Lo mflo R R[rd] = Lo 0 /--/--/12

Motion From Control mfc0 R R[rd] = CR[rs] ten /0/--/0

Multiply mult R {How-do-you-do,Lo} = R[rs] * R[rt] 0/--/--/xviii

Multiply Unsigned multu R {Hi,Lo} = R[rs] * R[rt] (vi) 0/--/--/nineteen

Shift Right Arith. sra R R[rd] = R[rt] >>> shamt 0/--/--/3

Store FP Single swc1 I M[R[rs]+SignExtImm] = F[rt] (2) 39/--/--/--

Store FP

Double sdc1 I Thou[R[rs]+SignExtImm] = F[rt]; (2)

Chiliad[R[rs]+SignExtImm+4] = F[rt+i] 3d/--/--/--

FR opcode fmt ft fs fd funct

31 26 25 21 20 16 15 eleven 10 vi 5 0

FI opcode fmt ft immediate

31 26 25 21 xx sixteen 15 0

Proper name MNEMONIC OPERATION

Branch Less Than blt if(R[rs]<R[rt]) PC = Label

Co-operative Greater Than bgt if(R[rs]>R[rt]) PC = Label

Branch Less Than or Equal ble if(R[rs]<=R[rt]) PC = Label

Branch Greater Than or Equal bge if(R[rs]>=R[rt]) PC = Characterization

Load Immediate li R[rd] = immediate

Motion movement R[rd] = R[rs]

Proper name NUMBER USE PRESERVED Beyond

A Call?

$null 0 The Constant Value 0 N.A.

$at 1 Assembler Temporary No

$v0-$v1 2-3 Values for Function Results

and Expression Evaluation No

$a0-$a3 four-vii Arguments No

$t0-$t7 eight-15 Temporaries No

$s0-$s7 16-23 Saved Temporaries Yes

$t8-$t9 24-25 Temporaries No

$k0-$k1 26-27 Reserved for OS Kernel No

$gp 28 Global Arrow Yes

$sp 29 Stack Pointer Yes

$fp 30 Frame Pointer Yes

$ra 31 Render Address No

12

MIPS Reference Data Card ("Green Card") 1. Pull along perforation to separate carte du jour ii. Fold bottom side (columns three and 4) together

FLOATING-POINT Teaching FORMATS

PSEUDOINSTRUCTION Prepare

Copyright 2009 by Elsevier, Inc., All rights reserved. From Patterson and Hennessy, Computer System and Design, 4th ed.

(4) BranchAddr = { 14{immediate[15]}, immediate, 2'b0 }

'

(half-dozen) Operands considered unsigned numbers (vs. 2 due south comp.)

Are Register Number In Hex On Mips Reference Sheet,

Source: https://www.studocu.com/row/document/tsinghua-university/computer-architecture/mips-green-sheet/9302483

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